Modern processors are required to execute complex tasks at very high speeds. The introduction of pipelined processor architectures improved the performances of modern processors but also introduced some problems. In a pipelined architecture an execution of an instruction is split to multiple stages.
One of the most commonly used mathematical operations is finding extreme values such as minimum values and maximal values within an array
Typically, the searching process was implemented by multiple instructions. Various loops and conditional branches were used in order to find the minimal or maximal value of an array of numbers.
U.S. patent application publication serial number 2003/0188143 of Scheaffer described a method for utilizing one 2N-way minimum/maximum instruction using N-stage 2-way minimum/maximum blocks.
In many cases the size of data blocks can change dramatically from application from another. In addition, the size of various data blocks can differ than 2N. In addition, in many cases not all the data chunks that belong to a data block are relevant to the extreme value search process.
There is a need to provide an efficient method and device for finding extreme values in a data block.